Means for delaying effective control of vehicle braking by an adaptive braking system until certain wheel velocity and deceleration conditions have been satisfied

ABSTRACT

In an adaptive braking system for automobiles, trucks and the like there is provided apparatus for delaying automatic braking control of the vehicle until, after the brakes are applied, a controlled wheel attains a first level of negative acceleration (deceleration) and thereafter the time integral of wheel acceleration attains a level related to controlled wheel speed.

United States Patent 1151 3,640,588 Carp et al. 51 Feb. 8, 1972 [54]MEANS FOR DELAYING EFFECTIVE [56] References Cited CONTROL OF VEHICLEBRAKING BY AN ADAPTIVE BRAKING SYSTEM 3 245 727 4/1 22; TI :1 303/21 EBl1 erson Ct UNTIL CERTAIN WHEEL VELOCITY 3,362,757 1/1968 Marcheron..303/21 P AND DECELERATION CONDITIONS 3,401,984 9/1968 Williams et al....3o3/21 BE HAVE BEEN SATISFIED 3,494,671 2/1970 Slavin et al. ..303/21P Inventors: Ralph W. Carp, Baltimore; Frederick 0.

Miesterfeld, Jopps, both of Md.

Primary ExaminerTrygve M. Blix Assistant Examiner-Stephen G. KuninAssignee; The Bendi Co ti Attorney-Flame, Arens, l-lartz, Smith &Thompson, Bruce L. Fl d M 3 1970 Lamb and William G. Christoforo 1 e r.Appl. No.: 16,166 [571 ABSTRACT In an adaptive braking system forautomobiles, trucks and the like there is provided apparatus fordelaying automatic brak- CL "303/21 188/18] g i3; ing control of thevehicle until, after the brakes are applied, a In Cl controlled wheelattains a first level of negative acceleration t. .B60t 8/08, B60t 8/12(deceleration) and thereafter the time integral of wheel held of Search8 /5 29% 2 2/l 6 l 2 celeration attains a level related to controlledwheel speed.

14 Claims, 4 Drawing Figures 2O 7 200 ATTENUATOR 12 '20 i r16 a SENSORCOMPARATOR INTEGRATING 22c MEANS I dl MEANS CIRCUT COMPARATOR 23 2L lOak 4 4 j L L TO BRAKE BRAKE ATTEN UATOR MEANS FOR DELAYING EFFECTIVECONTROL OF VEHICLE BRAKING BY AN ADAPTIVE BRAKING SYSTEM UNTIL CERTAINWHEEL VELOCITY AND DECELERATION CONDITIONS HAVE BEEN SATISFIEDCROSS-REFERENCES TO RELATED PATENT APPLICATIONS The delay meansdisclosed herein is an improvement for automobile, truck and the likeadaptive braking systems of the type disclosed in a patent applicationfor Automobile Anti- Skid Control System by M. Slavin et aL, applicationSer. No. 712,672, filed Mar. I3, 1968, now U.S. Pat. No. 3,494,671 andwhich is assigned to the assignee in the present application. The priorapplication is specifically referred to below and hereby incorporated byreference.

BACKGROUND OF THE INVENTION This invention relates to adaptive brakingsystems for automobiles and the like and more particularly to adaptivebraking systems which delay assuming automatic braking control of acontrolled wheel until the controlled wheel attains a first deceleration(negative acceleration) level and thereafter satisfies certain wheelacceleration and velocity requirements.

The wheel braking pressure which can be exerted by a motor vehicleoperator is sufficient to cause the wheels to lock with resultantincrease in stopping distance and reduced lateral vehicle stability.This is especially true when driving on low frictional coefficientsurfaces. However, it is possible to optimize braking characteristics ofa wheeled vehicle under any tire-road interface condition by providingthe vehicle with an adaptive braking system which will modulate thebraking pressure to a pressure which maximizes the frictional force atthe tire-road interface. In the aforementioned patent application thereis described an adaptive braking system which is composed basically ofan electronic control channel for each wheel or group of wheels to becontrolled. Briefly, a control channel includes a wheel sensor meanswhich generates a DC voltage level proportional to wheel rotationalspeed, a derivative amplifier which generates a DC voltage levelproportional to wheel acceleration and a number of comparators whichcompare actual wheel acceleration (or deceleration) with fixed referencelevels corresponding to predetermined values of wheel acceleration anddeceleration to generate error signals. The error signals are applied tomeans which in response thereto vary brake fluid pressure at thecontrolled wheel to maintain wheel slip at a point which tends tomaximize the frictional force developed at the tire-road interface. Theaforementioned system is partially activated when the vehicle operatordepresses his brake pedal and resultant wheel deceleration reaches afirst of the said reference levels which corresponds to a fixed amountof wheel deceleration. Thereafter, automatic braking control of thecontrolled wheel is delayed until certain wheel velocity criteria havebeen satisfied. In particular, if during a predetermined time periodafter the wheel has decelerated to the first reference level, wheelspeed drops to or below a certain percentage of the wheel speed at thetime the brakes were applied, the adaptive braking system is fullyactivated and the brake fluid pressure at the controlled wheel isthereafter automatically varied as the vehicle is brought to acontrolled stop. The advantages of this type of delay can be seen whenit is considered that a brake control wheel may strike an imperfectionin the roads surface, momentarily imparting a high level of wheeldeceleration to the wheel, possibly causing the automatic adaptivebraking system which is not equipped with such a delay means to assumecontrol of the braking even though optimum braking characteristics wouldhave been obtained in that case through continued manual control of thebraking system.

Certain other adaptive braking systems have mitigated this problem byproviding a means in the form of an integrating circuit for delayingautomatic braking control until the control wheel has attained apredetermined deceleration and thereafter the integral of decelerationwith respect to real time becomes equal to a predetermined constant. Itshould be noted that using the integrating delay technique justdescribed the same absolute change of vehicle wheel speed is required toinitiate automatic control regardless of the actual wheel speed whereasthose adaptive braking systems having delay means dependent upon wheelvelocity changing a predetermined percentage of initial wheel velocity,as earlier described, is more truly adaptive since the delay period isdependent upon actual wheel velocity.

SUMMARY OF THE INVENTION This initial delay can be made even moreadaptive by a means which compute the correct delay time from both wheelvelocity and wheel deceleration information. The circuit describedherein performs this computation by integrating the output of thederivative amplifier after the wheel has accelerated past the firstreference deceleration level and comparing this integrated result to theinstantaneous wheel speed. A second means described herein whichembodies the invention is a slightly modified form performs the delaycomputation by comparing integrated output of the derivative amplifierwith wheel speed as memorized at some predetermined point in the brakingcycle. It is thus one object of this invention to provide an adaptivebraking system for a wheeled vehicle having means delaying the automaticcontrol of the vehicle braking system.

It is still another object of this invention to provide a delay meansfor an adaptive braking system which is more fully responsive to actualwheel dynamic conditions than earlier known delay means.

It is another object of this invention to provide such a delay meanswhich operates in response to wheel velocity and wheel acceleration.

In the aforementioned patent application there was explained how anadaptive braking system delay means assured that automatic brakingcontrol was assumed only after the controlled wheel had passed over themaximum point of the mu-slip curve, which is a plot of the tire-roadinterface frictional force versus wheel slip, curves which are wellknown in the art. So also the delay means described herein will assurethat automatic braking control will be assumed only after the controlledwheel has passed over the maximum point of the mu-slip curve.Additionally, it will be explained how this can be accomplished byadjustment of certain circuit parameters. It is thus one further objectof this invention to provide delay means for an adaptive braking systemwhich will delay automatic braking control of a controlled wheel untilthe wheel has passed over the maximum point of the mu-slip curve.

These and other objects of the invention will become obvious in thefollowing description of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a block diagram whichillustrates the use of the invention including means for memorizingwheel speed in an adaptive braking system control channel.

FIG. 2 is a block diagram of an adaptive braking system control channelwhich includes the invention in a simplified form.

FIG. 3 is a block diagram showing a partial adaptive braking systemcontrol channel for controlling a group of wheels in response to inputsignals from one of the wheels and which includes the inputs to theinvention as shown in FIGS. I and 2.

FIG. 4 is a schematic of a circuit which illustrates the preferredembodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the figureswherein like numerals refer to like elements and referring particularlyto FIG. I, there is seen a block diagram of an adaptive braking systemcontrol channel. The sensor means 10 includes a wheel speed sensormounted upon and sensing the rotational speed of a wheel whose brakingcharacteristics are to be controlled, the sensor generating a frequencylinearly related to wheel speed which is converted to a DC voltage levelproportional to wheel rotational speed. This wheel speed signal appearson sensor output terminal 100 and is supplied to a derivative amplifier12 which generates in response thereto a DC voltage level proportionalto wheel acceleration on terminal 12a. The wheel acceleration signal isapplied to comparator means 14 wherein it is compared to variousreference levels with the comparator means generating output signalswhenever the sensed wheel attains these reference levels. For example,comparator means 14 generates an output, called hereinafter a G, signal,on terminal 14a when the wheel attains a first G, reference level.Comparator means suitable for use with this invention are generally wellknown to those skilled in the art. For example, a suitable comparatormeans can be comprised of a first comparator which compares the signalat terminal 12a against a G reference which corresponds to a level ofwheel deceleration, and a second comparator which compares the signal atterminal 12a against a G reference which corresponds to a level of wheeldeceleration less than the G level, which, of course, might be zerodeceleration or even some positive acceleration level. A particularcomparator means suitable for use with this invention is shown in theaforementioned U.S. patent where the g, and +g, reference levels seen inthe aforementioned patent correspond respectively to the G and Greference levels here. And produces a second output, called hereinaftera G signal, when the wheel thereafter attains a G reference level. Anintegrating circuit 16 is triggered by the JG, signal and thereafterintegrates the output of the differential amplifier 12 as sampled atterminal 12a. The output of the integrating circuit is thus the integralof an acceleration with respect to time, an output which has velocitydimensions, this output signal being applied to comparator 18. The wheelspeed signal on terminal a, which it will be remembered, is a DC voltagelevel proportional to wheel speed, is applied via line 11 to attenuator20, the output of which appears on line 20a and which comprises a secondspeed signal related to the signal on terminal 10a. The second speedsignal is applied through diode 21 to terminal 22a. A memory capacitor22 is connected between a constant voltage source, suitably ground, andterminal 22a. A normally conductive transistor 23 has itscollector-emitter circuit connected across capacitor 22 and its baseelectrode connected to receive the G, signal from comparator means 14.Transistor 23 is rendered nonconductive by the G, signal. It can be seenthat before the sensed wheel attains the G, reference level so thattransistor 23 collectoremitter circuit shunts capacitor 22, no voltagecan appear across capacitor 22. However, when the G, signal isgenerated, transistor 23 turns off and the second speed signal fromattenuator 20 will now appear across capacitor 22. Diode 21 now preventsthe signal stored across capacitor 22 from bleeding off through theattenuator. It should be obvious that this second speed signal could bememorized at other times during the braking cycle such as the instant atwhich the brakes are applied by connecting the base of transistor 23 toa switch ganged to the vehicle braking system. The memorized signal iscompared to the output of the integrating circuit in comparator 18, withthe comparator being effective only during the time that the brakes areapplied. When the comparison comes within predetermined bounds thecomparator 18 output signal is applied to the brake attenuator torelieve the braking pressure. In a practical adaptive braking system thedynamic range of the derivative amplifier 12 is usually restricted atthe high deceleration levels because of the desire to improve thevoltage output to deceleration ratio at the lower deceleration levels atwhich the system would normally operate. Thus, if the wheel weredecelerating rapidly at high deceleration levels, as might occur whilestopping on icy or otherwise slippery surfaces, derivative amplifier 12can be limited so that its output would not be truly indicative of thewheel conditions then existing. It this latter case the delay period isunduly extended so that the wheel may actually lock before automaticbrake control is assumed. FIG. 2 shows a simpler form of the inventionwhich also cures the above cited defect by comparing the integratedoutput of the derivative amplifier with the instantaneous wheel speed.Referring now to FIG. 2 it can be seen that the speed signal output ofsensor means 10 which appears on terminal is applied directly via line 11 to the input terminal 22a of comparator 18. As before, the speedsignal is differentiated in derivative amplifier 12 with a voltage levelcorresponding to wheel acceleration (or deceleration) appearing onterminal 12a. Comparator means 14 generates output signals at least whenthe acceleration level attains a G, and a G reference level, the Gsignal being used to trigger integrating circuit 16 to thereafterintegrate the acceleration signal from derivative amplifier 12 withrespect to time. The output of integrating circuit 16 is now comparedwith the instantaneous wheel speed in comparator 18. It should now beobvious that as the results of the integration increase, theinstantaneous speed signal decreases. Comparator 18 is arranged togenerate an error signal when its two input signals being compared areequal, with the error signal being applied to a brake attenuator toeffect attenuation of the wheel braking force.

Referring now to FIG. 3 which is a block diagram showing a partialadaptive braking system control channel for controlling a group ofwheels in response to input signals from one of the wheels, a type ofcontrol channel which is known in the art and which includes a sensormeans 10b which responds to the rotation of a first wheel to becontrolled, and a sensor means 10c which responds to the rotation of asecond wheel to be controlled, sensing means 10b and 10:: beingidentical to the sensor means 10 of FIGS. 1 and 2. In other words, theoutput of sensor means 10b is a DC voltage level proportional to therotational speed of the first wheel and the output of sensor means 100is a DC level proportional to the rotational speed of the second wheel.These speed signals are applied to select circuitry 25 which selects oneof the speed signals in accordance with their characteristics, eitherselecting at the option of the systemdesigner the speed signal from thefaster wheel or the speed signal from the slower wheel, this selectedspeed signal now appearing on output terminal 250. Circuitry forselecting the higher speed signal and circuitry for selecting the lowerspeed signal, either of which can be used with this invention at theoption of the system designer, is shown in the aforementioned U.S.patent. Briefly, these selecting circuits suitably comprisedifferentially connected transistors poled and biased to pass only thedesired signal. Output terminal 25a in FIG. 2 corresponds to outputterminal 10a in FIGS. 1 and 2 with the blocks to the right of terminal25a being identical to the blocks shown to the right of terminal 10a ineither FIG. 1 or FIG. 2. That is, the speed signal is applied to aderivative amplifier 12 with a DC voltage level signal proportional towheel acceleration appearing on line 12a and the speed signaladditionally being applied via line 11 to a memory if the embodiment ofFIG. 1 is used or via line 1 1 directly to input terminal 22a if theembodiment of FIG. 2 is used.

Referring now to FIG. 4, the G, signal from comparator means 14 isapplied to terminal 14a which is connected to the base electrode oftransistor 0,. In the embodiment shown the G, signal is of such polarityas to render transistor Q, nonconductive while in the absence of the G,signal Q, is conductive hence shunting capacitor C,. The output fromderivative amplifier 12 is applied from terminal 12a and throughresistors R, and potentiometer R to the emitter electrode of transistorQ This latter transistor is biased at its base electrode by a constantvoltage derived from the voltage divider comprised of resistors R, and Rconnected across the regulated A+ voltage supply. This base bias is setto just cutoff current through transistor 0 emitter-collector circuitwhen a signal corresponding to zero wheel acceleration is impressed onterminal 12a. Transistor Q as biased will be recognized as a constantcurrent source so long as it is not saturated. Thus, when the wheeldecelerates, the resultant signal on terminal 12a will cause transistorO to generate a current proportional to the terminal 12a signal level,which it will be remembered is proportional to wheel acceleration.Before the G, signal is generated capacitor C, is maintained in thedischarged state. However, when the G, signal is generated, indicatingthat the controlled wheel has attained the G, reference level,transistor Q, is turned off and thereafter current will flow intocapacitor C from the current source Q, at a rate, assuming R remainsconstant, determined by the signal on terminal 120.

lt should be obvious that by eliminating the constant current source orby allowing transistor 0, to operate in its saturated region, thecircuit comprised of capacitor C, and resistors R, and R, will operateas an RC circuit and such operation is within the scope of thisinvention. However, it is preferred, as shown in this embodiment, thatthe rate of charge buildup in capacitor C, be directly related to theacceleration signal to thus eliminate the nonlinearities introduced byan RC circuit.

It should also be obvious that the charge storage circuit comprised ofcapacitor C,, resistors R, and R and transistor O is suitably sealedwith regard to the signal on terminal 22a to cause the comparatorcomprised of differentially connected transistor Q and Q, to generateits error signal in accordance with the criteria set by the systemdesigner. And conversely, it is possible through the use of obviousmeans to scale the signal appearing on terminal 22a with regard to thecircuit constants of the charge storage circuit to obtain operation ofthe circuit as desired by the system designer.

A resistor R is provided in the discharge path of capacitor C, throughthe emitter-collector circuit of transistor Q,. Thus, if during theintegration period transistor Q, should be rendered momentarilyconductive, as for example, by noise in the circuit, capacitor C, wouldnot be completely discharged thereby but would retain the majority ofits then acquired charge.

The comparator comprised of transistors and Q, corresponds to comparator18 seen in FIGS. 1 and 2. It accordingly receives the speed signal asone input at the base electrode of transistor Q, on terminal 22a. Theintegrated derivative signal appearing across capacitor C, is applied tothe second input of the differential amplifier, the base electrode oftransistor 0,, through resistor R This comparator remains unenergizeduntil switch 25 which is connected to the vehicle brake pedal is closedby actuation thereof. The collector electrode of transistor 0., isconnected to a regulated A+ supply, while the collector of transistor0;, is connected through resistor R to the regulated A+ supply. Normallytransistor 0,, is conductive, however, when the integrated differentialsignal appearing at the base electrode of transistor Q becomes equal toand exceeds the speed signal at the base of transistor 0 transistor Qbecomes conductive and a resultant signal at its collector electrode isapplied to the base electrode of transistor 0,, thus rendering thattransistor and transistor 0, conductive. This energizes brake attenuator27 to thus attenuate the braking pressure in a manner well known tothose skilled in the art. Transistor 0 remains conductive until the Gsignal is generated indicating that the controlled wheel has attainedthe second reference acceleration level.

Feedback from the brake attenuator applied through resistors R, and R tothe base electrode of transistor 0,, maintains that transistorconductive, thus latching brake attenuator 27 in the energized state.This prevents brake attenuator 27 from being deenergized even though theG, signal may disappear from terminal 14a, an indication that thebraking pressure at the controlled wheel has been released, at least inpart. The brake attenuator thus remains energized until the controlledwheel attains the G, level at which time it will be rememberedcomparator means 14 (FIGS. 1 or 2) generates a positive going signal onterminal 14b which is applied to the base electrode of transistor 0Transistor Q which is normally cut off, is now rendered conductivegrounding the base electrode of transistor 0,, through thecollector-emitter circuit of transistor 0,. Thus, assuming the G, signalon terminal 14a has already been extinguished, .transistor Q, is cutoff, resulting in the deenergizing of brake attenuator 27,

Although only certain embodiments of the invention have been shown andthe invention has been shown in the environment of an adaptive brakingsystem described in a previous patent application, it should be obviousthe invention can be used with other adaptive braking systems havingsuitable signals, for example, signals corresponding to the G, and Gsignals described herein. It should also be noted that the exact form ofbrake attenuator does not comprise a part of the invention herein, andindeed, the invention may be used with any type of braking system, forexample, hydraulic, pneumatic etc., the attenuator being properlychosen. Accordingly, the inventors claim the subject matter within thetrue scope and spirit of the appended claims.

The invention claimed is: y

1. in a wheeled vehicle having a wheel braking system whereby saidvehicle wheels are braked by a braking force and an adaptive brakingcontrol channel including means for generating a first signalproportional to rotational speed of one of said wheels, means forgenerating a second signal proportional to rotational acceleration ofsaid wheel, means for generating a third signal when saidsecond signalattains a first reference level and means responsive to an error signalfor attenuating said braking force, an improvement to said adaptivebraking control channel comprising:

means actuated by said third signal for integrating said second signalwith respect to time; and,

comparator means for comparing said first signal with said integratedsignal to generate said error signal.

2. An improvement to an adaptive braking control channel as recited inclaim 1 with additionally:

means for sealing said first signal, said comparator means comparingsaid scaled first signal with said integrated signal to generate saiderror signal.

3. An improvement to an adaptive braking control channel as recited inclaim 1 with additionally:

memory means triggered at a predetermined time in the braking cycle ofsaid wheel for memorizing a portion of said first signal, saidcomparator means comparing said memorized signal with said integratedsignal to generate said error signal.

4. An improvement to an adaptive braking control channel as recited inclaim 1 with additionally:

memory means triggered by said third signal for memorizing a portion ofsaid first signal, said comparator means comparing said memorized signalwith said integrated signal to generate said error signal.

5. An improvement to an adaptive braking control channel as recited inclaim 1 wherein said control channel additionally includes means forgenerating a fourth signal when said second signal attains a secondreference level and wherein said comparator means additionally includeslatching means for latching said error signal on, said latching meansbeing responsive to said fourth signal for unlatching itself to therebyextinguish said error signal.

6. An improvement to an adaptive braking control channel as recited inclaim 5 wherein said latching means comprises a feedback circuitconnecting the output terminal of said comparator means to a first inputterminal of said comparator means, said error signal being generated onsaid output terminal and said integrated signal being applied at saidfirst input terminal, said latching means additionally comprisingunlatching means responsive to said fourth signal for interrupting saidfeedback circuit.

7. An improvement to an adaptive braking control channel as recited inclaim 1 wherein said integrating means comprises:

a charge storage device;

normally conductive means for discharging said charge storage device,said normally conductive means being responsive to said third signal forrendering it nonconductive; and,

means responsive to said second signal for supplying current to saidcharge storage device.

8. An improvement to an adaptive braking control channel as recited inclaim 1 wherein said integrating means comprises:

a charge storage device;

normally conductive means for discharging said charge storage device,said normally conductive means being responsive to said third signal forrendering it nonconduc- I tive; and,

a constant current source responsive to said second signal to set thecurrent supplied thereby, for supplying current to said charge storagedevice, the charge stored in said charge storage device being correlatedto said integrated second signal.

9. An improvement to an adaptive braking control channel as recited inclaim 8 wherein:

said charge storage device comprises a capacitor; and,

said normally conductive means comprises a second transistor having acollector-emitter circuit shunting said capacitor and a base electrodeconnected to said means for generating a third signal.

10. An improvement to an adaptive braking control channel as recited inclaim 9 wherein said normally conductive means comprises a transistorhaving a collector-emitter circuit shunting said capacitor, and a baseelectrode connected to receive said third signal.

11. An improvement to an adaptive braking control channel as recited inclaim 10 with additionally resistance means connected in saidcollector-emitter circuit for inhibiting discharge of said capacitorwhen said transistor is conductive.

12. An improvement to an adaptive braking control channel including aconstant current source as recited in claim 8 wherein said constantcurrent source comprises a transistor having a base electrode connectedto said constant voltage source, and a collector-emitter circuitconnected between said means for generating a second signal and saidcharge storage device.

13. An improvement to an adaptive braking control channel as recited inclaim 12 wherein:

said charge storage device comprises a capacitor; and,

said normally conductive means comprises a second transistor having acollector-emitter circuit shunting said capacitor and a base electrodeconnected to said means for generating a third signal.

14. An improvement to an adaptive braking control channel as recited inclaim 13 with additionally resistance means in said second transistorcollector-emitter circuit for inhibiting discharge of said capacitor.

1. In a wheeled vehicle having a wheel braking system whereby saidvehicle wheels are braked by a braking force and an adaptive brakingcontrol channel including means for generating a first signalproportional to rotational speed of one of said wheels, means forgenerating a second signal proportional to rotational acceleration ofsaid wheel, means for generating a third signal when said second signalattains a first reference level and means responsive to an error signalfor attenuating said braking force, an improvement to said adaptivebraking control channel comprising: means actuated by said third signalfor integrating said second signal with respect to time; and, comparatormeans for comparing said first signal with said integrated signal togenerate said error signal.
 2. An improvement to an adaptive brakingcontrol channel as recited in claim 1 with additionally: means forscaling said first signal, said comparator means comparing said scaledfirst signal with said integrated signal to generate said error signal.3. An improvement to an adaptive braking control channel as recited inclaim 1 with additionally: memory means triggered at a predeterminedtime in the braking cycle of said wheel for memorizing a portion of saidfirst signal, said comparator means comparing said memorized signal withsaid integrated signal to generate said error signal.
 4. An improvementto an adaptive braking control channel as recited in claim 1 withadditionally: memory means triggered by said third signal for memorizinga portion of said first signal, said comparator means comparing saidmemorized signal with said integrated signal to generate said errorsignal.
 5. An improvement to an adaptive braking control channel asrecited in claim 1 wherein said control channel additionally includesmeans for generating a fourth signal when said second signal attains asecond reference level and wherein said comparator means additionallyincludes latching means for latching said error signal on, said latchingmeans being responsive to said fourth signal for unlatching itself tothereby extinguish said error signal.
 6. An improvement to an adaptivebraking control channel as recited in claim 5 wherein said latchingmeans comprises a feedback circuit connecting the output terminal ofsaid comparator means to a first input terminal of said comparatormeans, said error signal being generated on said output terminal andsaid integrated signal being applied at said first input terminal, saidlatching means additionally comprising unlatching means responsive tosaid fourth signal for interrupting said feedback circuit.
 7. Animprovement to an adaptive braking control channel as recited in claim 1wherein said integrating means comprises: a charge storage device;normally conductive means for discharging said charge storage device,said normally conductive means being responsive to said third signal forrendering it nonconductive; and, means responsive to said second signalfor supplying current to said charge storage device.
 8. An improvementto an adaptive braking control channel as recited in claim 1 whereinsaid integrating means comprises: a charge storage device; normallyconductive means for discharging said charge storage device, saidnormally conductive means being responsive to said third signal forrendering it nonconductive; and, a constant current source responsive tosaid second signal to set the current supplied thereby, for supplyingcurrent to said charge storage device, the charge stored in said chargestorage device being correlated to said integrated second signal.
 9. Animprovement to an adaptive braking control channel as recited in claim 8wherein: said charge storage device comprises a capacitor; and, saidnormally conductive means comprises a second transistor having acollector-emitter circuit shunting said capacitor and a base electrodeconnected to said means for generAting a third signal.
 10. Animprovement to an adaptive braking control channel as recited in claim 9wherein said normally conductive means comprises a transistor having acollector-emitter circuit shunting said capacitor, and a base electrodeconnected to receive said third signal.
 11. An improvement to anadaptive braking control channel as recited in claim 10 withadditionally resistance means connected in said collector-emittercircuit for inhibiting discharge of said capacitor when said transistoris conductive.
 12. An improvement to an adaptive braking control channelincluding a constant current source as recited in claim 8 wherein saidconstant current source comprises a transistor having a base electrodeconnected to said constant voltage source, and a collector-emittercircuit connected between said means for generating a second signal andsaid charge storage device.
 13. An improvement to an adaptive brakingcontrol channel as recited in claim 12 wherein: said charge storagedevice comprises a capacitor; and, said normally conductive meanscomprises a second transistor having a collector-emitter circuitshunting said capacitor and a base electrode connected to said means forgenerating a third signal.
 14. An improvement to an adaptive brakingcontrol channel as recited in claim 13 with additionally resistancemeans in said second transistor collector-emitter circuit for inhibitingdischarge of said capacitor.